On-Chip Resonance in Nanoscale Integrated Circuits

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Novel and innovative design methodologies for interconnect networks are required to maintain high performance in current highly complex integrated circuits. The focus of this book is on three important interconnect networks: clock, data, and power generation and distribution networks. Design and analysis methodologies to improve the performance of these networks have been developed. Specifically, the following three topics have been addressed in this book. Exploiting resonance for distributing high frequency clock signals is a promising technology to reduce power dissipation, clock skew, and jitter. A comprehensive methodology for designing these resonant networks has been developed. On-chip resonance has also been used to design a novel data distribution network. By eliminating the need for traditional buffer insertion, a significant reduction in power and latency has been observed. A distributed DC-DC buck converter implemented in three-dimensional (3-D) technology has also been developed. The proposed converter eliminates the need for a traditional LC filter, enabling the on-chip integration of DC-DC converters.